SR Flip-Flop: What is SR Flip-Flop Truth Table?

By Priyanshu Vaish|Updated : August 26th, 2022

The SR Flip-Flop is also known as the gated or clocked SR latch. The clocked SR latch or SR flip-flop temporarily stores or holds the information until it is needed in digital circuits. 'S' and 'R' are the two inputs to the SR flip-flop. It has two outputs, the main output 'Q' and the complements of the main output ' Q' '. The SR Flip-Flop is a storage element with only one bit.

The SR flip-flop is a gated SR flip-flop with a clock input circuitry that does not prevent the illegal or invalid output state that can arise when both inputs S and R are equal to logic level "1". The SR latch is constructed using two cross-coupled NAND gates. Let us discuss in detail about these in the upcoming sections.

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What is SR Flip-Flop?

The SR flip-flop is also named as RS flipflop. When both the inputs of the SR flip-flop are high, then the indeterminate state is theirs. In other programming environments, it is required to assign determinate outputs to all flipflop conditions. Hence, RS and SR flip-flops were designed. The clocked SR flip-flop is shown below.

SR Flip-Flop Circuit Diagram

SR Flip Flop Circuit Diagram

The circuit is similar to the SR latch except for the clock signal and two AND gates. The SR flip-flop circuit responds to the positive edge of the clock pulse to the inputs S and R.

SR Flip-Flop is Used as

SR Flip-Flop is Used as a storage device for a single data bit.

Symbol of SR Flip-Flop

The symbol of SR Flip Flop is shown below:

Symbol of SR Flip-Flop

SR Flip-Flop Truth Table

'S' and 'R' are the two inputs to the SR flip-flop. The Qn represents the state of the SR flip-flop before applying the inputs, and Qn+1 represents the state of the SR flip-flop as output. The truth table for SR flip-flop is shown below:

SR Flip-Flop Truth Table

Clock

S

R

Qn+1

State

0

X

X

Qn

X

1

0

0

Qn

Hold

1

0

1

0

Reset

1

1

0

1

Set

1

1

1

X

Invalid

SR Flip-Flop Characteristic Table

The characteristic table of SR flip-flop is as follows:

SR Flip-Flop Characteristic Table

S

R

Qn

Qn+1

0

0

0

0

0

0

1

1

0

1

0

0

0

1

1

0

1

0

0

1

1

0

1

1

1

1

0

X

1

1

1

X

Characteristic Equation for SR Flip-Flop

The characteristic equation is an algebraic expression for the characteristic table's binary information. It specifies the value of the next state of a flip-flop in terms of its present state and present excitation. To obtain the characteristic equation of SR flip-flop, the K-map for the next state Qn+1 in terms of present state and inputs is shown as:

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The characteristic equation of SR flip-flop from the above K-map is 

Equation of SR Flip Flop

Excitation Table of SR Flip-Flop

The truth table of flip-flop refers to the operation characteristic of the flip-flop. Still, in the designing of sequential circuits, we often face situations where the present state and the next state of the flip-flop are specified, and we must determine the input conditions that must exist in order for the intended output condition to occur.
The excitation table of SR flip-flop lists the present state, and the next state and the excitation table of SR flip-flop indicate the excitations required to take the flip-flop from the present state to the next state. The excitation table of SR flip-flops is as follows:

Qn

Qn+1

S

R

0

0

0

X

0

1

1

0

1

0

0

1

1

1

X

0

Important Topics for Gate Exam
Types Of SlabsGear Terminologies
Thermal StressRolling Contact Bearing
Shear ForceSliding Contact Bearing
Mohr's CircleSurface Tension
Resonance In RLC CircuitTurning Moment Diagram

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FAQs on SR Flip-Flop

  • The SR flip-flop is the 1-bit bistable memory device having two inputs, SET and RESET. The SET input 'S' of the SR flip-flop sets the device or generates the output as 1, and the RESET input 'R' of the SR flip-flop resets the device or generates the output as 0. The SET and RESET inputs are named S and R in the SR flip-flop, respectively.

  • The combination of the SR flip-flop is when both S and R are set to high as S=1 and R= 1, then the indeterminate state occurs. The advantage of using the SR flip-flop is that it is simple and produces certain outputs.

  • The gated SR flip-flop is the basic flipflop that generates the feedback from both the outputs back to its opposing input. The SR flip-flop circuit stores the 1-bit data in the bistable memory device. So, this flip-flop has three inputs: ' S' and 'R', and the current output 'Q'.

  • In the SR flip-flop circuit, the NAND gate is used to provide feedback from both the outputs back to its opposing inputs that are S and R. It is commonly used in memory device circuits to store a 1-bit of data.

  • The SR latch is constructed from two NAND gates. The SR latch(Set/Reset) is an asynchronous device that works independently of control signals and relies only on the inputs state of the SR latch that is S and R. 

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