Combinational Circuits -1 Study Notes for GATE & Computer Science Engineering Exams

Combinational Logic Circuit: A combinational logic circuit comprises digital logic gates whose output completely depends upon the combination of current inputs only.

• It consists of input variables, logic gate and output variables.
• No feedback is required.
• No memory is required. 

• Examples of Combinational Circuits: Multiplexer, Decoder, Encoder, Parallel Adders, etc.

Sequential Logic Circuit: This Circuit consists of logic gates arranged in parallel and its output is determined by the combination of the current input and the prior output. Sequential circuit also contains memory elements that are capable to store the information of the prior output.  

• Examples of Sequential Circuits: Flip-flops, Shift Registers, Counters, etc.

Logic Gates

Logic gate is an idealized physical device which is used to implement a Boolean function, logic gate is a miniature circuit that performs a logical operation on one or more logical inputs and produces a single logical output.

The logic gates can be classified as

• NOT, AND, OR, are basic gates.
• NAND, NOR are universal gates.
• EXOR, EXNOR are arithmetic circuit or code convertor or comparators.

NOT Gate (Inverter)

Truth Table for NOT Gate:

Circuit Symbol for NOT Gate:

AND Gate

Properties of AND logic:

1. Commutative Law: AB = BA
2. Associative Law: ABC = (AB) C = (AC)B = A(BC)

OR Gate Truth Table

Properties of OR logic:

1. Commutative Law: A + B = B + A
2. Associative Law: (A + B + C) = (A + B) + C = A + (B+ C)

NAND Gate

Properties of NAND logic:

1. Commutative Law:
2. Associative Law:

NOR Gate

• NOR gate follows commutative law but not follow associative law

EXOR Gate

Properties of EXOR Logic:

• Enable input = 0
• Disable input = 1
• It is also called stair case switch.
• It is widely used in parity generation and detection.
• When both the inputs are different, then output becomes high or logic 1.
• When both the inputs are same, then output becomes low or logic 0.

Note: 

EXNOR Gate

Properties of EXNOR Gate:

• Enable input = 1
• Disable input = 0
• When both the inputs are same, then output .becomes high or logic 1.
• When both the inputs are different, then output becomes low or logic 0.

Logic Gate Conversions

• OR Gate using NAND Gate:

• AND Gate using NOR Gate:

• NAND Gate using NOR Gate

• NOR Gate using AND Gate

NAND and NOR Gate as Universal Gate

NAND Gate as Universal Gate

Boolean Algebra

1. NOT-Operation theorem:
2. AND-Operation theorem:
3. OR-Operation theorem:
4. Distribution theorem: A + BC = A (A + B)(A + C)

Note:

1. Demorgan’s Theorem:
2. Transposition Theorem: (A + B) (A + C) = A + BC
3. Consensus Theorem: This theorem is used to eliminate redundant term. It is applicable only when if a boolean function contains three variables. Each variable used two times. Only one variable is complemented or uncomplemented. Then the related terms so that complemented or uncomplemented variable is the answer.

SOP (Sum of Product): (Minimum Term)

A sum of product expression is two or more AND functions or functions together. Each product term is known as minimum term.

• SOP expression is used when output becomes logic 1.
• Example:
  • three minterms are there in the expression

POS (Product of Sum): (Maximum Term)

POS is defined as the AND function of two or more OR function in which each sum term is known as maximum term.

• POS expression is used when output is logic '0'.
• Example:
  • Three max terms are there in the expression

Note:

With' n' variables maximum possible minimum and maximum terms = 2ⁿ

With' n' variables maximum possible logic expression =

Duality Theorem: To convert positive logic into negative logic and vice-versa, dual function are used.

• Change each AND sign by OR sign and vice versa (↔ +)
• Complement any 0 or l appearing in expression.
• Keep variable as it is.
• Example: 

Representation of K-map: For n-variable Karnaugh-map, 2ⁿ cells are used to represent the boolean expression.

Example:

• 2 –variable K Map:

• 3 –variable K Map:

• 4 –variable K Map:

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