1. The 8085 Addressing Modes
The various formats for specifying operands are called the addressing modes. For 8085, they are
- Immediate Addressing:
- Data is provided in the instruction.
- Load the immediate data to the destination provided.
- Example: MVI A, 12 H
- Register Addressing:
- Data is provided through the registers.
- Example: MOV B, C
- Direct Addressing:
- Used to accept data from outside devices to store in the accumulator or send the data stored in the accumulator to the outside device.
- Example: MOV A, 
- Indirect Addressing:
- The effective address is calculated by the processor and the contents of the address is used to form the second address. The second address is where the data is stored.
- Example: MOV A, []
- Implicit addressing:
- In this addressing mode, the data itself specifies the data to be operated upon.
- Example: CMA; Complement the contents of accumulator
2. 8085 Instruction set
An instruction is a binary pattern designed inside a microprocessor to perform a specific function. Each instruction is represented by 8-bit binary value. The instruction set can be categorised int0 5 types:
- Data transfer instructions:
- These instructions are used to transfer data from one register to another register, from memory to register or register to memory.
- When an instruction of data transfer group is executed, data is transferred from the source to the destination without altering the contents of the source.
- Examples: MOV, MVI, LXI, LDA, STA, etc.
- Arithmetic instructions:
- These instructions are used to perform arithmetic operations such as addition, subtraction, increment or decrement of the content of a register or memory.
- Examples: ADD, ADC, ADI, DAD, SUB, INR, DCR, etc.
- Logical instructions:
- These instructions are used to perform logical operations such as AND, OR, compare, rotate etc.
- Examples: ANA, ANI, ORA, ORI, XRA, CMA, CMC , STC, CMP, RLC, RAL, RAR, etc.
- Branching Instructions:
- These instructions are used to perform a conditional and unconditional jump, subroutine call and return, and restart.
- Examples: JZ, JNZ, JC, JNC, JP, JM, JPE, JPO, CALL, RET, RST, etc.
- Machine Control Instructions:
- These instructions control machine functions such as Halt, Interrupt, or do nothing.
- The microprocessor operations related to data manipulation can be summarized in four functions: copying data, performing arithmetic operations, performing logical operations, testing for a given condition and alerting the program sequence.
- Example: PUSH, POP, HLT, XTHL, NOP, EI, DI, etc.
Example-1: Write 8085 assembly program for multiplying two 8 bit numbers.
- MVI A,00 ; Load immediate data into accumulator.
- MVI B,02 ; Load immediate data into register B.
- MVI C,04 ; Load immediate data into register C.
- LOOP: ADD B; Add the content of to accumulator.
- DCR C; Decrement the content of register C by 1.
- JNZ LOOP
- STA 1000 H; Store the content of accumulator to memory location 1000 H
- HLT; Halt
Example-2: Write 8085 assembly program to find the largest number in an array of data.
- LXI H, 1000; Load the address of the first element of the array in HL pair
- MOV B, M; Load the Count
- INX H; Set the first element as largest data
- MOV A, M; Get the first data in A
- DCR B; Decrements the count
- LOOP: INX H
- CMP M; Compare A and M
- JNC AHEAD; if no carry (A>M) then go to AHEAD
- MOV A, M; Set the new value as largest
- AHEAD: DCR B
- JNZ LOOP; Repeat comparisons till count = 0
- STA 2000; Store the largest value at 2000
4. Direct Memory Access
Direct memory access (DMA) facilitates data transfer operations between the main memory and I/O subsystems with limited CPU intervention. The majority of I/O devices provide two methods for transferring data between a device and memory.
- Programmed I/O (PIO): It is fairly easy to implement but requires the processor to constantly read or write a single memory word (8-bits, 16-bits or 32-bits, depending on the device interface) until the data transfer is complete. Although PIO is not necessarily slower than DMA, it does consume more processor cycles and can be detrimental in a multi-processing environment.
- DMA: It allows a system to issue an I/O command to a device, initiate a DMA transaction and then place the process in a waiting queue. The system can now continue by selecting another process for execution, thereby utilizing the CPU cycles typically lost when using PIO. The DMA controller will inform the system when its current operation has been completed by issuing an interrupt signal. Although the data is still transferred 1 memory unit at a time from the device, the transfer to main memory now circumvents the CPU because the DMA controller can directly access the memory unit.
Steps involved in the mode of DMA transfer are as follows.
- A device wishing to perform DMA asserts the processor's bus request signal.
- Processor completes the current bus cycle and then asserts the bus grant signal to the device.
- The device then asserts the bus grant ack signal.
- The processor senses in the change in the state of bus grant acknowledgement signal and start listening to the data and address bus for DMA activity.
- The DMA device performs the transfer from the source to the destination address.
- During these transfers, the processor monitors the addresses on the bus and checks if any location modified during DMA operations is cached in the processor. If the processor detects a cached address on the bus, it can take one of the two actions:
- Processor invalidates the internal cache entry for the address involved in DMA write operation
- Processor updates the internal cache when a DMA write is detected
- Once the DMA operations have been completed, the device releases the bus by asserting the bus release signal.
- Processor acknowledges the bus release and resumes its bus cycles from the point it left off.
The 8085 microprocessor has two pins available for DMA mode of I/O communication: HOLD (Hold) and HLDA (Hold Acknowledge).
- HOLD: This is an active-high input signal to the 8085 from another master requesting the use of the address and data buses. After receiving the HOLD request, the Microprocessor relinquishes the buses in the following machine cycle. All buses are tri-stated and a Hold Acknowledge signal is sent out. The Microprocessor regains the control of buses after HOLD goes low.
- HLDA: This is an active-high output signal indicating that the MPU is relinquishing the control of the buses. Typically, an external peripheral such as the DMA controller sends a request a high signal to the HOLD pin. The processor completes the execution of the current machine cycle; floats (high impedance state) the address, the data, and the control lines; and sends the Hold Acknowledge (HLDA) signal. The DMA controller takes control of the buses and transfers data directly between source and destination, thus bypassing the microprocessor. At the end of data transfer, the controller terminates the request by sending a low signal to the HOLD pin, and the microprocessor regains control of the buses.
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