**Single-phase voltage source inverter:**

**Single Phase half bridge Inverter**

** Figure :** **Single phase half bridge Inverter**

** Figure :** **Waveforms for Single phase half bridge Inverter**

When T_{1} is ON during the period from 0 < t < T/2, the output voltage becomes,

V_{0} = +V_{S}/2

When T_{2} is ON during the period from T/2 < t < T, the output voltage becomes,

V_{0} = –V_{S}/2

Hence, the complete voltage equation becomes,

The main drawback of half bridge inverter is that it requires a 3-wire DC supply. However, this drawback is overcome by full-bridge inverter.

**Single phase full bridge Inverter:**

** Figure:** **Single phase full bridge inverter**

** Figure :** **Waveforms for Single phase full bridge Inverter**

For full-bridge inverter, when thyristors T_{1}, T_{2} conduct, load voltage is V_{5} and when T_{3}, T_{4} conduct load voltage is - V_{s} as shown. Frequency of output voltage can be controlled by varying the periodic time T.

It should be ensured that two SCRs in the same branch, such as T1, T2 do not conduct simultaneously as this would lead to a direct short circuit of the source.

For a resistive load, load current i_{0} and load voltage v_{0} would always be in phase with each other. This, however, is not the case when the load is other than resistive. For such types of loads, current i_{0} will not be in phase with voltage v_{0} and diodes connected in antiparallel with thyristors will allow the current to flow when the main thyristors are turned off. These diodes are called feedback diodes.

**Single Phase full bridge inverter with different types of loads:**

** Figure :** **Single phase full bridge Inverter with RLC Load**

(i) R load. For a resistive load R, load current waveform i_{0} is identical with load voltage waveform V_{0} and diodes D_{1}-D_{4} do not come into conduction.

(ii) RL and RLC overdamped loads. The load current waveforms for RL and RLC overdamped loads are shown in Figure below. Before t = 0. thyristors T_{3}, T_{4} are conducting and load current i_{0} is flowing from B to A, i.e. in the reversed direction. This current is shown as - I_{0 }at t = 0, After T_{3}, T_{4} are turned off at t = 0, current i_{0} cannot change its direction immediately because of the nature of load. As a result, diodes D_{1}, D_{2} start conducting after t = 0 and allow i_{0} to flow against the supply voltage V. As soon as D_{1}, D_{2} begin to conduct, load is subjected to V_{s} as shown. Though T_{1}, T_{2} are gated at t = 0, these SCRs will not turn on as these are reverse biased by voltage drops across diodes D_{1} and D_{2}. When load current through D_{1}, D_{2} falls to zero, T_{1} and T_{2} become forward biased by source voltage V_{s}, T_{1} and T_{2} therefore get turned on as these are gated for a period T/2 sec. Now load current i_{0} flows in the positive direction from A to B. At t = T/2; T_{1}, T_{2} are turned off by forced commutation and as load current cannot reverse immediately, diodes D_{3}, D_{4} come into conduction to allow the flow of current i_{0} after T/2.

Thyristors T_{3}, T_{4}, though gated, will not turn on as these are reverse biased by the voltage drop in diodes D_{3}, D_{4}. When current in diodes D_{3}, D_{4} drops to zero; T_{3}, T_{4} are turned on as these are already gated.

(iii) RLC underdamped load. The load current i_{0} for RLC underdamped load is shown in figure below. After t = 0; T_{1}, T_{2} are conducting the load current. As i_{0} through T_{1}, T_{2} reduces to zero at t_{1}, these SCRs are turned off before T_{3}, T_{4} are gated. As T_{1}, T_{2} stop conducting, current through the load reverses and is now carried by diodes D_{1}, D_{2} as T_{3}, T_{4} are not yet gated. The diodes D_{1}, D_{2} are connected in antiparallel to T_{1}, T_{2}; the voltage drop in these diodes appears as a reverse bias across T_{1}, T_{2}. If duration of this reverse bias is more than the SCR turn-off time t_{q}, i.e. If (T/2 – t_{1}) > t_{q} ; T_{1}, T_{2} will get commutated naturally and therefore no commutation circuitry will be needed. This method of commutation, knows as load commutation, is in fact used in high frequency inverters used for induction heating.

** Figure :** **Waveforms for Single phase full bridge Inverter with different load conditions**

**Fourier analysis of single-phase inverter**

Output voltage of single-phase half bridge inverter,

Output voltage of single-phase full bridge inverter,

**Harmonic Factor of n ^{th} Harmonic:**

It is defined as the ratio of RMS value of n^{th} harmonics components to the RMS value of the fundamental component.

Where, V_{n} =RMS value of the n^{th} harmonic’s component of output voltage.

V_{01} =RMS value of fundamental component of output voltage.

**Total Harmonic Distortion (THD):**

It is defined as the ratio of RMS value of all the harmonic voltage component to the RMS value of the fundamental voltage component.

V_{0h} = RMS value of all harmonic components present in the inverter output voltage.

V_{or} = RMS value of inverter output voltage, including fundamental plus all the harmonics.

Total Harmonic Distortion (THD) is a measure of the waveform distortion. Lower the value of THD, lower is the amount of distortion in voltage (or current) waveform.

**Three-phase bridge inverter:**

** Figure : Three Phase Bridge Inverter**

In Inverter terminology a step is defined as a change in the firing form one thyristor to the next thyristor in proper sequence. For one cycle of 360°, each step would be of 60° interval for a six-step inverter.

This mean that thyristors would be gated at regular intervals of 60° in proper sequence so that 3-phase ac voltage is synthesized at the output terminals of a six-step inverter.

**Three Phase 180⁰ Mode:**

In this mode, each thyristor conducts for 180⁰ of a cycle. It means that if T_{1} conducts for 180⁰, T_{4} conducts for next 180⁰. SCRs in upper group T_{1}, T_{3} and T_{5} are triggered at a delay of 120⁰. Same applies for T_{2}, T_{4} and T_{6} also. Thus, at any point of instant, three thyristors are conducting.

In the three-phase inverter of 180^{o} mode, each SCR conducts for 180° of a cycle. Thyristors pair in each arm i.e. T_{1}, T_{4}; T_{3}, T_{6} and T_{5}, T_{2} are turned on with a time interval of 180°. It means that T_{1} conducts for 180° and T_{4} for the next 180° of a cycle.

Thyristors in the upper group, i.e. T_{1}, T_{3}, T_{5} conduct at an interval of 120°. It implies that if T_{1} is fired at ωt = 0°, then T_{3} must be fired at ωt = 120° and T_{5} at ωt = 240°. Same is true for lower group of SCRs.

Based on this firing scheme, a table is prepared as shown at the top of figure. In this table, first row shows that T_{1} from upper group conducts for 180°, T_{4 }for the next 180° and then again T_{1} for 180° and so on. In the second row, T_{3} from the upper group is shown to start conducting 120° after T_{1} starts conducting. After T_{3} conduction for 180°, T_{6} conducts for the next 180° and again T_{3} for the next 180° and so on. Further in the third row, T_{5} from the upper group starts conducting 120° after T_{3} or 240° after T_{1}. After T_{s} conduction for 180°, T_{2} conducts for the next 180°, T_{5} for the next 180° and so on. These output voltages are plotted in figure. For each cycle of output voltage of each phase, six steps are required, and each step has duration of 60°.

** Figure : Voltage waveforms for 180⁰ mode three phase VSI**

RMS value of line voltage,

**Note:** Phase angle between two sequential SCRs either from top group (or) from bottom group is 120°

- At any time three SCR’s would be there in the conduction.

Shape of phase voltage is three-stepped waveform. Shape of line voltage is Quasi-square wave. In the 1^{st} step (1,6,5) thyristors are turned-on.

- There is no time gap between communication of outgoing SCR and conduction of incoming SCR. Leads to the simultaneous conduction of both incoming and outgoing SCR’s, due to which source will be short circuit. Hence 120° mode of operation is used.

**Fourier series for ‘a’ phase voltage:**

**Three Phase 120⁰ Mode:**

A basic three-phase inverter is a six-step bridge inverter it uses a minimum of six thyristors. In inverter terminology a step is defined as a change in the firing from one thyristor to the next thyristor in proper sequence. For one cycle of 360°, each step would be of 60° interval for a six-step inverter. This mean that thyristors would be gated at regular intervals of 60° in proper sequence so that 3-phase ac voltage is synthesized at the output terminals of a six-step inverter.

For this inverter, a table giving the sequence of firing the six thyristors is prepared as shown in the top of figure. In this table, first rows show that T_{1} conducts for 120° and for the next 60° neither T_{1} nor T_{4} conducts. Now T_{4} is turned on at ωt = 180° and it further conducts for 120°, i.e. from ωt = 180° to ωt = 300°.

This means that for 60° Interval from ωt = 120° to ωt = 180°, series connected SCRs do not conduct. At ωt = 300°, T_{4} is turned off, then 60° interval elapses before T_{1} is turned on again at ωt = 360°. In the second row, T_{3} is turned on at ωt = 120° as in 180° mode inverter, Now T_{3} conducts for 120°, then 60° interval elapses during which neither T_{3} nor T_{6} conducts. At ωt = 300°, T_{6} is turned on, it conducts for 120° and then 60° interval elapses after which T_{3} is turned on again. The third row is also completed similarly. This table shows that T_{6}. T_{1} should be gated for step-I; T_{1}, T_{2} for step-II; T_{2}, T_{3} for step-III and so on. During each step only two thyristors conduct for this inverter - one from the upper group and one from the lower group.

** Figure :** **Voltage waveform for three-phase 120⁰ mode VSI**

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