EDC & Analog Electronics : Timers & Oscillators

By Yash Bansal|Updated : May 15th, 2021

EDC & Analog Electronics : Timers & Oscillators












1. The 555 Timer Circuit:



    Block diagram representation of the internal circuit of the 555-IC timer


A block diagram representation of the 555-timer circuit is shown in figure . The circuit consist of two comparators, an SR flip-flop and a transistor Q1 that operates as a switch. One power supply VCC is required for operation.  A resistive voltage divider, consisting of the three equal valued resistor R1 which is equal to 5kΩ is connected across VCC and establishes the reference or threshold voltages for the two comparators.


SR flip-flop works as a bi-stable circuit having the complementary outputs, denoted as Q andbyjusexamprep 

In set state, the output at Q is ‘high’ (approximately equal to VCC) and that at byjusexamprep is ‘low’ (approximately equal to 0 V).In reset state, the output Q is low andbyjusexamprepis high.

The flipflop is set by applying a high level (VCC) to its set input terminal S and reset by applying to the reset input terminal R. The outputs of comparator 1 and comparator 2 respectively are connected to the set and reset input terminals of the flip flop.

The positive input terminal of the comparator 1 is connected to a external terminal of the 555 IC is labelled as Threshold.  Similarly, the negative input terminal of comparator 2 is connected to an external terminal labelled as Trigger and the collector of transistor Q1 is connected to a terminal labelled discharge. finally, the output of flip flop Q is connected to output terminal.

2. Implementation of Monostable Multivibrator using 555 Timer:



 The external circuitry and waveform of 555 IC as monostable multivibrator is shown in figure 2(a) & (b). Before applications of trigger pulse VT , The voltage at trigger input is high which is equal to +VCC.  outputbyjusexamprep and output voltage V0 is equal to 1. With byjusexamprep and output voltage V0 is equal to 1. When  byjusexamprep the discharging  transistor Q1 undergoes to saturation and across the timing capacitor the voltage will be zero i.e., VC(t) = 0.

At t = 0, on the application of trigger VT (negative going pulse) <VCC/3 causes output of comparator C2 to be high i.e. S = 1. This will set the flip flop with byjusexamprep This makes output voltage V0 = 0. Due to byjusexamprepthe discharge transistor Q1 will get turned off. After the termination of trigger pulse, the flipflop will remain inbyjusexamprep state, since S = 0 and R = 0, So no change in state. The timing capacitor charges up exponentially toward final value of V+ through resistor R.

The capacitor voltage is given by


When v(t) = 2/3 V+, the threshold comparator output goes high, resetting the flip flop. Output byjusexamprep then goes high and the output of the 555 goes low. The high output at byjusexamprep 

turns on the discharge transistor, allowing the timing capacitor to discharge to near zero volts. The circuit thus returns to its Quiescent state.

The width the output pulse is determined from equ. (i) by putting

v(t) = 2/3 v+ and t = T, then


The width of the output pulse is a function of only the external time constant RC, it is independent of supply voltage V+ and any internal circuit parameters.

3.Implementation of Astable Multivibrator using 555 Timer:


               Astable Multivibrator 555  Circuit


In this the threshold and trigger input is connected together. In astable mode, the timing capacitor C charges through RA = RB until v(t) reaches 2/3 V+. The threshold comparator output then goes high, forcing the flip flop output byjusexamprep to go high. The discharge transistor turns on, and the timing capacitor C discharges through RB and the discharge transistor.

The capacitor voltage decreases until it reaches (1/3)V+, at which point the trigger comparator switches stages and sendsbyjusexamprep low.

The discharge transistor turns off, and the timing capacitor begins to recharge. When v(t) reaches the threshold level of (2/3) V+, the cycle repeat itself.



Therefore, charging time is given as


When the timing capacitor is discharging, during the time 0 < t’ < TD, the capacitor voltage is


Duty cycle: It is defined as the percentage of time the output is high during one period of oscillation. during the changing time TC, the output is high and during discharging time TD, the output is low.




  • Oscillators are electronic circuits that generate an output signal without the necessity of an input signal. It produces a periodic waveform on its output with only the DC supply voltage as an input.
  • It produces a periodic waveform on its output with only the DC supply voltage as an input.
  • Different types of oscillators produce various types of outputs including sine waves, square waves, triangular waves, and sawtooth waves.
  • The basic structure of a sinusoidal oscillator consists of an amplifier and a frequency selective network connected in a positive feedback loop as shown in figure 1.


In the block diagram of figure 1,

Vd = Vf + Vin

V0 = AVd

Vf = βV0

Using these relationships, the following equation is obtained:


Equation (i) & (ii) gives two requirements for oscillation:

  • The magnitude of the loop gain Aβ must be at least 1, and
  • The total phase shift of the loop gain Aβ must be equal to 0° or 360°.

The above conditions is known as Barkhausen criterion.

In figure 1, if the amplifier causes a phase shift of 180°, the feedback circuit must provide an additional phase shift of 180° so that the total phase shift around the loop is 360°. The type of waveform generated by an oscillator depends on the components in the circuit hence may be sinusoidal, square or triangular. In addition, the frequency of oscillation is determined by the components in the feedback circuit.

Oscillators can be of 2 types:

Feedback Oscillators:

  • One type of oscillator is the feedback oscillator, which returns a fraction of the output signal to the input with no net phase shift, resulting in a reinforcement of the output signal.
  • After oscillations are started, the loop gain is maintained at 1.0 to maintain oscillations.
  • A feedback oscillator consists of an amplifier for gain (either a discrete transistor or an op-amp) and a positive feedback circuit that produces phase shift and provides attenuation.

Relaxation Oscillators:

  • Instead of feedback, a relaxation oscillator uses an RC timing circuit to generate a waveform that is generally a square wave or other non sinusoidal waveform.
  • Typically, a relaxation oscillator uses a Schmitt trigger or other device that changes states to alternately charge and discharge a capacitor through a resistor.


Oscillation with RC Feedback Circuits

  • Three types of feedback oscillators that use RC circuits to produce sinusoidal outputs are the:
    • Wien-bridge oscillator
    • Phase-shift oscillator
    • Twin-T oscillator
  • Generally, RC feedback oscillators are used for frequencies up to about 1 MHz.
  • The Wien-bridge is by far the most widely used type of RC feedback oscillator for this range of frequencies.
  • Wien Bridge Oscillator

    Because of its simplicity and stability, one of the most commonly used audio-frequency oscillators is the wein bridge. Figure 2 shows the wein bridge oscillator in which the wein bridge circuit is connected between the amplifier input terminals and the output terminal. The bridge has a series RC network in one arm and a parallel RC network in adjoining arm. In the remaining two arms of the bridge, resistors R1 and R2 are connected.

    The phase angle criterion for oscillation is that the total phase shift around the circuit must be 0°. This condition occurs only when the bridge is balanced, that is at resonance. the frequency of oscillation f0 is exactly the resonant frequency of the balanced wein bridge and is given by:


    Assuming that the resistors are equal in value, and capacitors are equal in value in the reactive leg of the wein bridge. At this frequency the gain required for sustained oscillation is given by


    Phase-shift Oscillator

    • A phase-shift oscillator relies upon an R-C phase shift network to provide the necessary phase relationship between output and input to a CE amplifier. The frequency of oscillation is given by and the phase shift is 180o.

      1 Phase-shift Oscillator using Op-Amp:


    The op-amp is used in the inverting mode; therefore, any signal that appears at the inverting terminal is shifted by 180° at the output. An additional 180° phase sift required for oscillation is provided by the cascaded RC networks. Thus, the total phase shift around the loop is 360° (or 0°). At some specific frequency when the phase shift of the cascaded RC networks is exactly 180° and the gain of the amplifier is sufficiently large, the circuit will oscillate at the frequency. This frequency is called the frequency of oscillation f0 and is given by



    • For the loop gain βA to be greater than unity, the gain of the amplifier stage must be greater than 1/β or 29.

    A > 29

    2 Phase-shift Oscillator using FET:

    Here an FET amplifier of conventional design is followed by three cascaded arrangements of a capacitor C and a resistor R, the output of the last RC combination being returned to the gate. If the loading of the phase-shift network on the amplifier can be neglected, the amplifier shifts by 180° the phase of any voltage which appears on the gate, and the network of resistors and capacitors shifts the phase by an additional amount. At some frequency the phase-shift introduced by the RC network will be precisely 180° and at this frequency the total phase-shift from the gate around the circuit and back to the gate will be exactly zero. This particular frequency will be the one at which the circuit will oscillate, provided that the magnitude of the amplification is sufficiently large.


    The frequency of oscillation for this circuit is given by


    In order that |βA| shall not be less than unity, it is required that |A| be at least 29. Hence and FET with μ < 29 cannot be made to oscillate in such a circuit.


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