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GATE EC : Digital Circuits Champion Quiz 3
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Question 1
Consider the given circuit,
In this circuit, the race around
In this circuit, the race around
Question 2
The output of a 3-stage Johnson (twisted-ring) counter is fed to a digital-to-analog (D/A) converter as shown in the figure below. Assume all states of the counter to be unset initially. The waveform which represents the D/A converter output V0 is
Question 3
The function of a strobe function in digital system is
Question 4
Following shift register is initially loaded with the bit pattern “1010”. After how many clock cycles will the content of shift register be “1010” again?
Question 5
A master slave flip-flop has the characteristic that
Question 6
Two D-flip-flops, as shown below, are to be connected as a synchronous counter that goes through the following Q1 Q0 sequence
00 → 01 → 11 → 10 → 00 → ……..
The input D0 and D1 respectively should be connected as
00 → 01 → 11 → 10 → 00 → ……..
The input D0 and D1 respectively should be connected as
Question 7
For each of the positive edge-triggered J-K flip flop used in the following figure, the propagation delay is ΔT
Which of the following waveforms correctly represents the output at Q1?
Which of the following waveforms correctly represents the output at Q1?
Question 8
The present output Qn of an edge triggered JK flip-flop is logic 0. If J=1, then Qn +1
Question 9
Refer to the NAND and NOR latches shown in the figure. The inputs (P1, P2) for both the latches are first made (0, 1) and then, after a few seconds, made (1, 1). The corresponding stable outputs (Q1, Q2) are
Question 10
For the circuit shown, the counter state (Q1 Q0) follows the sequence
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Feb 16ESE & GATE EC