GATE 2025 Digital Circuits Quiz 25

For the given circuit, binary ‘1’ is equal to +5V and binary ‘0’ is equal to 0V. Then the equivalent analog voltage (in Volts) when inputs Q₀ Q₁ Q₂ are 011 is ………..

Consider the 4-bit DAC shown in the following figure. The output voltage V₀ for an input data 0100 will be _______ V.

Integrated output waveform for the dual slope ADC is shown in figure.

The time T for an 8–bit counter with 4 MHz clock will be

Conversion times of 10 bit digital ramp ADC is t₁ and a 10 bit Successive- approximation ADC is t₂. If both utilize a 500 kHz clock frequency so the ratio of t₁ to t₂ is ________

(Rounded up to two decimal value)

Which of fall is state diagram for Mealy machine shown :–

A synchronous state machine is created with a state diagram as given below. The output of this circuit is taken from the LSB of the 3-bit counter which is formed based on the state table. If the output is plotted for the first 5 clock pulses after the machine was started from state ‘0’, then the output unipolar waveform will look like