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# GATE 2025 Analog Circuits Quiz 8

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Question 1

In the given figure , , the magnitude of voltage gain() will be ___

Question 2

In the circuit shown, V1 = 0 and V2 = Vdd. The other relevant parameters are mentioned in the figure. Ignoring the effect of channel length modulation and the body effect, the value of Iout is ___________ mA (rounded off to 1 decimal place).

Question 3

The two transistor are identical and VA=∞ (collection current IC = 1mA, VT = 25mV, RB = 25kΩ, β=99).  the impedance seen from the emitter of Q is _____Ω (rounded up to two decimal value )

Question 4

An n-channel JFET, having a pinch-off voltage (Vp) of –5 V, shows a transconductance (gm) of 1 mA/V when the applied gate-to-source voltage (VGS) is – 3V. Its maximum transconductance (in mA/V) is

Question 5

For the given fixed-bias configuration, determine the parameters re & ro for its equivalent re  model of the transistor, if the input impedance of the network is 1 kΩ and the output impedance is 4 kΩ.

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