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GATE 2025 Analog Circuits Quiz 8

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Question 1

In the given figure ,

, the magnitude of voltage gain(

) will be ___

Question 2

In the circuit shown, V₁ = 0 and V₂ = V_dd. The other relevant parameters are mentioned in the figure. Ignoring the effect of channel length modulation and the body effect, the value of I_out is ___________ mA (rounded off to 1 decimal place).

Question 3

The two transistor are identical and V_A=∞ (collection current I_C = 1mA, V_T = 25mV, R_B = 25kΩ, β=99). the impedance seen from the emitter of Q₂ is _____Ω (rounded up to two decimal value )

Question 4

An n-channel JFET, having a pinch-off voltage (V_p) of –5 V, shows a transconductance (g_m) of 1 mA/V when the applied gate-to-source voltage (V_GS) is – 3V. Its maximum transconductance (in mA/V) is

Question 5

For the given fixed-bias configuration, determine the parameters r_e & r_o for its equivalent r_e model of the transistor, if the input impedance of the network is 1 kΩ and the output impedance is 4 kΩ.

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ESE & GATE EC Analog Circuits

Nov 22ESE & GATE EC