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# GATE 2023 Digital Circuits Quiz 25

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Question 1

For the given circuit, binary ‘1’ is equal to +5V and binary ‘0’ is equal to 0V. Then the equivalent analog voltage (in Volts) when inputs Q0 Q1 Q2 are 011 is ……….. Question 2

Consider the 4-bit DAC shown in the following figure. The output voltage V0 for an input data 0100 will be _______ V. Question 3

Integrated output waveform for the dual slope ADC is shown in figure. The time T for an 8–bit counter with 4 MHz clock will be

Question 4

Conversion times of 10 bit digital ramp ADC is t1 and a 10 bit Successive- approximation ADC is t2. If both utilize a 500 kHz clock frequency so the ratio of t1 to t2 is ________

(Rounded up to two decimal value)

Question 5

Which of fall is state diagram for Mealy machine shown :– Question 6

A synchronous state machine is created with a state diagram as given below. The output of this circuit is taken from the LSB of the 3-bit counter which is formed based on the state table. If the output is plotted for the first 5 clock pulses after the machine was started from state ‘0’, then the output unipolar waveform will look like • 39 attempts
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