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UPPCL AE Digital Electronics Quiz 4

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Question 1

How many input lines are there in a ‘Full Adder’?

Question 2

Which of the following is a combinational logic circuit designed to switch one of several input lines to a single common output line?

Question 3

The range of decimal number that can be represented using 5 bit 2’s compliment

Question 4

For the implementation of Borrow circuit in Half subtractor, minimum number of two input NOR gate required are

Question 5

The minimum number of 2 to 1 multiplexers required to realize an 8 to 1 Multiplexer is

Question 6

Given two half adders, what extra 2-input gate is required to build a full adder?

Question 7

Find the other equivalent of  .

Question 8

The circuit show below is

Question 9

For the given configuration of 2:1 MUX with 4:1 MUX, what will be the output at Y?

Question 10

Bubbles on the gate shows
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