How many separate address and data lines are needed for a memory of 8K × 16?
Question 2
If A + B = and A - B =
Find the determinant of AB.
Question 3
Consider the hypothetical processor in which application program refers to integer and floating-point units during the execution. Floating point unit is enhanced then it runs three times faster but only 20% instruction are floating-point instruction in the program. What is the overall speedup?(upto 3 decimal point)
Question 4
If the Base register contains 8080 value and Address field of an instruction contains -42, then what is the branch address when the instruction is designed with based register Addressing mode.
Question 5
Consider the two processors P1 and P2 with intermediate register gateway is 0.
P1 : Has four stage pipeline with stage latency 1.5 nsec, 2 nsec, 1 nsec and 0.5 nsec.
P2 : Has five stage pipeline with stage latency 1 nsec, 2.5 nsec, 1.5 nsec, 2 nsec and 1 nsec.
If each processor has infinite number of instruction to execute, then which of the following is true?
Question 6
Identity matrix is ____
Question 7
The main advantage of Static RAM over Dynamic RAM is
Question 8
The instruction pipeline of RISC processor has 200 instructions in which 100 are performing addition, 25 performing division and 75 are performing multiplications, where Execution state for addition take 1 clock cycle, multiplication take 3 clock cycles and division take 5 clock cycles. Assume pipeline has 5 stages IF, ID, EX, MA and WB and there is no data and control hazard. The number of clock cycles required for execution of sequence of instructions are ________.
Question 9
A total of 2n people, consisting of n married couples, are randomly divided into n pairs. After dividing them into pairs, arbitrarily numbering of the women is done. Let Wi denote the event that woman i is paired with her husband. What is the value of [150* P (Wi/ Wj)], if value of n=100 and P (Wi/ Wj) represent the conditional probability?
Question 10
Identify the number of correct statements:
a) Stall cycle arises due to uneven clock cycles needed by each stage for instructions.
b) A solution for data dependency problem is operand forwarding
c) A solution for data dependency problem is register renaming.
d) We can use “Pre-fetch Target Instruction” mechanism for solving Resource Conflict Problem.
Question 11
A packet of 20 batteries is known to include 4 batteries that are defective. If 8 batteries are randomly chosen and tested, the probability of finding among them not more than 1 defective battery is