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GATE CS 2022 : Computer Organization Quiz-4
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Question 1
Consider a processor that includes a base register with indexing addressing mode. Suppose an instruction is encountered that employs this addressing mode and specifies a displacement of 7B2, in hexadecimal. Currently the base and index register contain the decimal numbers 48022 and 8, respectively. What is the address of the operand (In Decimal)?
Question 2
The x86 includes the following instruction:
IMUL op1,op2, immediate
This instruction multiplies op2, which may be either register or memory, by the immediate operand value,and places the result in op1,which must be a register. There is no other three-operand instruction of this sort in the instruction set. What is the possible use of such an instruction?
IMUL op1,op2, immediate
This instruction multiplies op2, which may be either register or memory, by the immediate operand value,and places the result in op1,which must be a register. There is no other three-operand instruction of this sort in the instruction set. What is the possible use of such an instruction?
Question 3
Assume an instruction set that uses a fixed 16-bit instruction length. Operand specifiers are 6 bits in length. There are K two-operand instructions and L zero-operand instructions. What is the maximum number of one-operand instructions that can be supported?
Question 4
Define: EA= (X)+ is the effective address equal to the contents of location X, with X incremented by one word length after the effective address is calculated;
EA= -(X)is the effective address equal to the contents of location X, with X decremented by one word length before the effective address is calculated;
EA= (X)+ is the effective address equal to the contents of location X, with X decremented by one word length after the effective address is calculated.
Consider the following instructions, each in the format (Operation Source Operand, Destination Operand), with the result of the operation placed in the destination operand.
Which of these instructions can pop the top two elements from the stack, perform the designated operation and store the result back to the stack, where X is the Top of Stack?
EA= -(X)is the effective address equal to the contents of location X, with X decremented by one word length before the effective address is calculated;
EA= (X)+ is the effective address equal to the contents of location X, with X decremented by one word length after the effective address is calculated.
Consider the following instructions, each in the format (Operation Source Operand, Destination Operand), with the result of the operation placed in the destination operand.
Which of these instructions can pop the top two elements from the stack, perform the designated operation and store the result back to the stack, where X is the Top of Stack?
Question 5
Consider the hypothetical control unit which supports 8k control word, hardware contains 80 control signals, 16 flags and 32 branch condition are used to control the branch logic. What is the size of a control word in bits using Vertical micro-programming?
Question 6
Considering 4 bytes long PC-relative jump instruction store in the memory location (8040) base
A ‘-42’ signed constant is present in the address field of instruction .What is branch address?
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Nov 1GATE & PSU CS
