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GATE CS 2022 : Computer Organization Quiz-3
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Question 1
For Instruction, SUB R1,(R2)+ operand fetch will not have_______ control signal.
Question 2
Consider a CPU where all the instructions require 9 clock cycles to complete execution. There are 70 instructions in the instruction set. It is found that 40 control signals are needed to be generated by the control unit. While designing the horizontal micro-programmed control unit, single address field format is used for branch control logic. What is the minimum size of the control word and control address register?
Question 3
Which of the following is correct defines the microprogram?
Question 4
In a pipelined RISC computer, where arithmetic instructions and Load/store instructions are carried out, which of the following method will not definitely help in faster execution when only load/store instruction are performed?
Question 5
Consider a 8-Byte long PC relative JMP instruction stored in word addressable memory of word size 16 bit. If starting address of the instruction is 434 in decimal, and -21 is present in the address field of the instruction. What is the branch address______.
Question 6
Consider a hypothetical CPU, which supports 46 register window, 16 global registers, 24 local registers ,16 IN register and 16 OUT registers. What is the difference between window size and register file size_________________?
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