GATE 2024 Digital Electronics Foundation Quiz 85

If the memory chip size is 1024 × 1, then the number of memory chips needed to design 8 Kbyte memory is

A 2k × 8 bit is interfaced to an 8-bit microprocesser. If the address of the first memory location in the RAM is 0600H. The address of the last memory location will be

Determine the size of PROM required for implementing the 16:1 multiplexer logic circuit in the form of 2^N×M, then find the value of M+N is

A dynamic RAM cell which holds 5V has to be refreshed every 20 msec, so that the stored voltage does not fall by more than 0.5 V. If cell has constant discharge current of 0.1 pA, storage capacitance of the cell is 4 x 10^–x F then x = _____

Consider the following opinions regarding the advantage and disadvantage of a Mealy model:

1) Advantage: Less number of states (hence less hardware)

Disadvantage: Input transients are directly conveyed to output

2) Advantage: Output remains stable over entire clock period

Disadvantage: Input transients persist for long duration at output

Which of the above is/are correct?