GATE 2024 Computer Organization & Architecture Foundation Quiz 83

A DMA is transferring characters to processor from a device transmitting at 16000 bits per seconds. Assume DMA using cycle stealing mode. If processor needs access to main memory once every microsecond. The percentage processor be slow down due to DMA activity?

Consider a computer system with DMA support. The DMA module is transferring one 8-bit character in one CPU cycle from a device to memory through cycle stealing mode at regular intervals. Consider a 4 MHz processor. If 0.6% processor cycles are used for DMA, the data transfer rate of the device is _____ bits per second. [in the nearest integer]

A DMA module transfers characters to memory using cycle stealing mode from a device transmitting at a rate of 19200bps. The speed at which the processor fetches the instruction is 2 million per second (2 MIPS). Due to DMA, CPU slowed down by ______ (in %, up to 2 decimal places).

Suppose that a bus has 16 data lines and requires 4 cycles of 250nsec each to transfer data. The bandwidth of this bus would be 2 MB/sec. If the cycle time of the bus was reduced to 125nsec and the number of cycles required for transfer stayed the same, what would the bandwidth of the bus?

An 8-Bit DMA Device is operating is Cycle Stealing Mode (Single Transfer Mode). Each DMA cycle is of 6 clock states and DMA clock is 2 MHz. Intermediate CPU machine cycle takes 2 μs, the DMA Data Transfer Rate is: