Time Left - 15:00 mins

GATE 2023 Digital Logic Quiz 43

Attempt now to get your rank among 79 students!

Question 1

The minimum number of 2 × 1 MUX required to implement a half-subtractor circuit when only basic inputs 0, 1, A, and B are available is?

Question 2

Find the number of EPI’s in the following function ‘F’ ?

F(W, X, Y, Z) = ∑m(0, 2, 7, 8, 10, 12, 14, 15)

Question 3

Which of the following is not a valid rule for XOR?

Question 4

The Boolean function realized by the logic circuit shown below is?

Question 5

STATEMENT1: A Demultiplexer is built by using AND gates only.

STATEMENT2: A Demultiplexer can be used as a Decoder.

Question 6

A MUX circuit shown in figure:

The correct expression for  is?

  • 79 attempts
  • 0 upvotes
  • 0 comments
Oct 11GATE & PSU CS