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GATE 2023 Computer Organisation & Architecture Evaluation Quiz 4
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Question 1
Identify the false statements:
: Separate I/O address space does not necessarily mean that I/O address lines are physically separated.
: Address decoder is an essential part of I/O interface.
: Separate I/O address space does not necessarily mean that I/O address lines are physically separated. : Address decoder is an essential part of I/O interface.Question 2
The program counter (PC) in a microprocessor.
Question 3
How many separate address and data lines are needed for a memory of 8K × 16?
Question 4
Index register in a microprocessor is used for?
Question 5
During direct memory access (DMA), the INTR and INTA (interrupt and Interrupt acknowledge) lines are __________
Question 6
Which of the following is incorrect regarding Hardwired control unit Design ?
Question 7
Assume a stack-oriented processor that includes the stack operations PUSH and POP. Arithmetic operations automatically involve the top one or two stack elements. Begin with an empty stack. What stack did elements remain after the following instructions are executed?
PUSH 4
PUSH 7
PUSH 8
ADD
PUSH 10
SUB
MUL
What will be the number of elements present in the stack after all operations and the value of TOP_OF_STACK?
PUSH 4
PUSH 7
PUSH 8
ADD
PUSH 10
SUB
MUL
What will be the number of elements present in the stack after all operations and the value of TOP_OF_STACK?
Question 8
When is the conditional and unconditional transfer of control instruction executed in the RISC pipeline?
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