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GATE 2023 Analog Circuits Quiz 7

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Question 1

In the circuit shown below, the Zener diode is ideal and the Zener voltage is 6V. The output voltage V0 (in volts) is ____________.
Description: D:\GradeStack Courses\GATE Tests (Sent by Ravi)\GATE EC 10-Mar\GATE-ECE-2015-Paper-1_files\image059.jpg

Question 2

Consider the voltage series regulator circuit as shown in figure below. Assume that transistors are in active region with VBE = 0.7V & β = 50. If the Zener diode is working in breakdown region with then the output voltage is

Question 3

A silicon transistor with VBE(sat)=0 .8 V, β=hfe=100, VCE=0 .2 V is used in the circuit shown. The maximum value of RC for which transistor remain in saturation is ______ kΩ

Question 4

In the given circuit NPN transistor has very high value of β. The required RZ in KΩ to have 2 mA is.

Question 5

In the circuit shown, transistors Q1 and Q2 are biased at a collector current of 2.6mA. If transistor current gains are sufficiently large to assume collector current equal to emitter current and thermal voltage of 26 mV, the magnitude of voltage gain V0/Vs in the mid-band frequency range is __________ (up to second decimal place).
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Question 6

A DC current of 26 μA flows through the circuit shown. The diode in the circuit is forward biased and it has an ideality factor of one. At the quiescent point, the diode has a junction capacitance of 0.5 nF. Its neutral region resistances can be neglected. Assume that the room temperature thermal equivalent voltage is 26 mV.

For the amplitude of the small-signal component of diode current (in μA, correct to one decimal place) is ___________.

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Apr 26ESE & GATE EC