GATE 2022: Digital Logic Quiz- 6

STATEMENT1: A Demultiplexer is built by using AND gates only.

STATEMENT2: A Demultiplexer can be used as a Decoder.

What is the function of the given circuit in diagram?

For a carry look ahead binary adder for n (n>5) bit binary numbers A and B, then consider the following SOP expression for generating carry:

C₅ = G₅ + P_aG_b + P_cP₅G₃ + P₅P₄P₃G_d + P₅P_eP₃P₂G₁ + P₅P₄P₃P₂P₁G₀ + P₅P₄P₃P₂P₁P₀C_f

Where P_i is the propagation function and G_i is the generating function and have usual meaning.

i.e. G_i = A_i . B_i

P_i = A_i⊕ B_i

C_-1 is the input carry.

What will be correct values for the subscripts a, b, c, d, e, f?

Aman was implementing 4X16 Decoder using minimum number of 2X4 Decoders with enable Input. The implementation of 4X16 Decoder is given in the following figure.

Now this Decoder has to be converted to 2X4 Decoder. Aman drew the following diagram.

But he was confused what to place in place of W, X, Y, Z out of A, B, C, D. Choose the correct option to help Aman solve the problem correctly.

How many full adders needed to construct 8-bit parallel adder?

Given a combinational circuit below:

(2 X 1 multiplexer are being used)

What will be the sum min terms at output f?