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ESE 2019 Technical ( COA : Quiz 1 )

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Question 1

The processor control instructions are:
i) CLC
ii) WAIT
iii) CMC

Question 2

The Harward Architecture explains about:
i) instructions and data by various memories
ii) each bus instruction
iii) 14 bit instruction format only

Question 3

The slowest DMA transfer is:

Question 4

Consider the following statements regarding the functions of an operating system in a computer:
1) It controls hardware access
2) It manages files and folders
3) It provides a user interface
4) It manages applications
Which of the above statements are correct?

Question 5

A computer system has a cache with access time 10 ns, a hit ratio of 80% and average memory access time is 20 ns. Then what is the access time for physical memory?

Question 6

The incorrect match (when n > 1) is?

Question 7

Assertion (A): In a micro programmed CPU, each machine instruction is executed by a real-time interpreter.
Reason (R): Real-time interpreter helps to achieve high degree parallelism in micro programmed control.

Question 8

Select the correct option for picture letters shown?

Question 9

Which among the following locking level is highly restrictive?

Question 10

As per schedule SH shown for transactions A, B, C, D, select the correct option which describes the schedule SH correctly?

i) conflict
ii) recoverable
iii) non conflict
iv) serializable

360 attempts
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ESE & GATE EC Computer Organization & Architecture

Oct 4ESE & GATE EC