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DFCCIL EE Digital Electronics Quiz 5
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Question 1
Which of the following statement is correct?
1) The basic RS latch is asynchronous device.
2) The clocked RS flip flop adds a valuable synchronous feature to RS latch.
Question 2
In the given figure a 4-bit synchronous counter is shown with active low clear. Q0 is LSB and Q3 is MSB. What is the type of counter?
Question 3
In the circuit given in the below figure, Q = 0 initially. What shall be the subsequent states of Q when clock pulses are given?
Question 4
Which of the following is correct when JK flip flop is made using D flip flop.
Question 5
The number of flip flops that will be complemented in a 10-bit binary ripple up counter to reach the next count after the count 1011001111 will be
Question 6
In a 4-bit serial in-parallel out right shift register shown in figure below. After four clock pulses are applied the content of the shift register will be
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AE & JE ExamsMay 19AE & JE Exams