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Computer Organization & Architecture : Nuclear Quiz-3

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Question 1

A RAM chip has 7 address lines , 8 data lines and 2 chips select lines. Then the number of memory locations is ________.

Question 2

The Memory Address Register

Question 3

Which of the following is present at the bottom of the memory hierarchy?

Question 4

The effectiveness of the cache memory is based on the property of ________

Question 5

In time division switches if each memory access takes 100 ns and one frame period is 125 μs, then maximum number of lines that can be supported is

Question 6

A cache memory needs an access time of 30 ns and main memory 150 ns, what is the average access time of CPU (assume hit ratio = 80%)?

Question 7

A 4-way set associative cache memory consists of 128 blocks. The main memory consists of 32768 memory blocks and each block contains 512 eight bit words. Find how many bits are needed to represent TAG, SET and WORD field respectively?

Question 8

Consider a fully associative mapped cache of size 16 KB with block size 256 bytes. The size of main memory is 128 KB . Find the number of bits in tag.

Question 9

The time for the disk arm to move the heads to the cylinder containing the desired sector is called __________.

Question 10

What is the amount of time takes for the desired sector of a disk to rotate under the read-write heads of the disk drive?
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