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Combinational Circuit
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Question 1
4 to 1 MUX would have ____________
Question 2
Consider the logic circuit given below:
Input line at line I13 in 16×1 MUX corresponds to output at line In’ of 1×16 De-MUX. The value of n is _______.
Question 3
P number of 3 to 8-line decoders with an enable input are needed to construct a 9 to 512-line decoder without using any other logic gates. Then the value of P is _____.
Question 4
Which of the following multiplexers shows the correct implementation of OR gate?
Question 5
Consider the circuit shown below:
The output function
is equal to
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May 23GATE & PSU CS
