Time Left - 10:00 mins
Analog Electronics: Electrical Engineering Quiz 74
Attempt now to get your rank among 903 students!
Question 1
A diode is working under the forward-biased region. If the applied voltage increases in magnitude, the depletion region will continue to decrease. The current through the diode will:
Question 2
What percentage of current is the drain current for a JFET, if the gate-to-source voltage is 70% of the pinch-off voltage?
Question 3
For the given fixed-bias configuration, determine the parameters re & ro for its equivalent re model of the transistor, if the input impedance of the network is 1 kΩ and the output impedance is 4 kΩ.
Question 4
Consider the circuit shown in the figure. In this circuit R = 1 kΩ and C = 1 μF. The input voltage is sinusoidal with a frequency of 50 Hz, represented as a phasor with magnitude Vi and phase angle 0 radian as shown in the figure. The output voltage is represented as a phasor with magnitude V0 and phase angle δ radian. What is the value of the output phase angle δ (in radian) relative to the phase angle of the input voltage?
Question 5
A hysteresis type TTL inverter is used to realize an oscillator in the circuit shown in the figure.
If the lower and upper trigger level voltages are 0.9 V and 1.7 V, the period (in ms), for which output is LOW, is __________.
If the lower and upper trigger level voltages are 0.9 V and 1.7 V, the period (in ms), for which output is LOW, is __________.
- 903 attempts
- 1 upvote
- 3 comments
Jul 14ESE & GATE EE