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IIIT Hyderabad Practice Quiz : Digital Logic-3
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The Boolean expression for the shaded area in the Venn diagram is
Consider the following sequence of instructions:
The logic function F(A, B, C, D) = AD + ABD + ABC + ACD is to be realized using an 8 to 1 multiplexer shown in the figure.
The input I6 to the multiplexer will be
Which of the following is the slowest adder?
The race around condition occurs in a level trigger J-K flip-flop when
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Mar 16GATE & PSU CS
Priya UpadhyayMember since Sep 2020Priya Upadhyay