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IIIT Hyderabad Practice Quiz : Computer organization-4
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The permissible latencies for a given 7 stage pipeline are 1, 3, 6. Greedy latency cycles are
More than one word is put in one cache block to
A magnetic Hard disk has 1024 sectors/track, 5 platters each with two recording surfaces and 500 cylinders. The address of the sector is given as triple (c, h, s) where c= cylinder number h surface number and s = sector number. First sector address is (0,0,0) then address of the last sector in (c, h, s) format is
A 4-way set associative cache has lines of 32 byte and a total cache size of 16 KB. Which of the following main memory block is mapped on to the set ‘13’ of the cache memory when 16 MB of main memory is used?
Match List-I (programming terms) with List-II (addressing modes) and select the correct answer using the codes given below the lists:
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Mar 21GATE & PSU CS
Harshita AgarwalMember since Jul 2020