GATE EE 2021: Semi-Syllabus Quiz 1 (App update required to attempt this test)
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Consider the following network
Determine the potential difference between P and Q.
The z transform of is
The UTP and LTP voltage of the circuit shown are (assume Vz = 8.3V, Vy = 0.7V).
The polynomial s2 + (1 – k)s + (k – 2) ,Where k is a real valued parameter has its roots in the left half of complex plane for
Ideal transformer can not be described by
The analog input voltage of 3 bit counter type ADC is 2.5V. The reference voltage of DAC is 3.5V, what will be the binary in the BCD display unit.
The Laplace transform of signal x(t) shown in figure is?
Step response of a set of three second order under damped systems all have same peak time.
Which of the following diagrams represents poles of three systems?
The initial binary sequence of the given counter is 000 where is LSB and is MSB. Find the binary sequence at After 4 clock pulses
The op-amp used in the circuit shown in figure has a slew rate of 0.5 V/μ sec, with its other parameters being ideal. The frequency of input signal upto which undistorted output is obtained in the circuit is __ kHz.
A system has the following output relationship
the impulse response of the system is
δ(t) - e–at u(t) such that the value of a is __________.
In a k-bit magnitude comparator each data size is k bit, the number of A<B combinations that generates high output is 28. Then size of k is ____ bits
The block diagram of a control system is given below:
The root locus of the system is plotted as the value of parameter α is varied. The breakaway point is s = ________
Consider the following circuit.
If a resistance of 40 Ω is connected between a and b terminal, then what will be the value of current through the resistor.
For Designing a DC regulated power supply of 6V across the load with variable load current of 1mA to 20mA Zener diode specifications are (IZ)min = 0.1 mA & Iz max = 50 mA with input unregulated DC voltage of 10V to 15V a circuit shown in figure.
So the suitable value of resistance of RS is
Consider the battery charging circuit in Figure with Vm = 20V, R = 10Ω and VB = 14V
If the diode is ideal, so the percentage of each cycle in which the diode is in on state is _____% of the time.
A full adder is implemented with two half adders and one OR gate. OR gate is used to derive the final carry function of full adder. In each half adder,
and and .
The minimum time required to derive both the sum and carry function of a full adder after applying the inputs is _____ ns
Find the Norton equivalent parameters between the terminals "ab" and also find the value of current i through 5Ω resistor?
Consider the bode magnitude plot shown in figure. The transfer function G(s) is
Consider the signal
The energy of the signal is
Find the linear convolution on the signals
The asymptotic approximation of the variation of gain with frequency of a control system (Bode plot) is shown below. The transfer function of the system is
Consider the circuit below, the value of R for which maximum power is transferred from circuit A to circuit B is.
The following diagram is used to produce 10 GHz clock frequency at Y. The propagation delay of each NOT gate will be ____ pico seconds
Consider the monostable multivibrator circuit shown below. If the monostable multivibrator with a 100 μs output pulse then the value of R(in kΩ)