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# GATE EC 2022: Electronic Devices Quiz 4

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Question 1

A metal-semiconductor junction is taken. The variation of the electric field inside the semiconductor is shown in the figure below

The built-in potential of the diode is _____V.

Question 2

Considersilicon diode at. The slope of the diffusion capacitance versus forward bias current is. The hole lifetime is _______.

(Assume forward bias current)

(Assume forward bias current)

Question 3

The built-in potential for a silicon p-n junction diode with N

(Given intrinsic carrier concentration n

_{D}= 10^{14}cm^{-3}and N_{A}= 10^{17}cm^{-3}for T=300K will be ___V?(Given intrinsic carrier concentration n

_{i}=1.510^{10}cm^{3}).Question 4

Consider an abrupt PN junction (at T = 300 K) shown in the figure. The depletion region width X

_{n}on the N-side of the junction is 0.2 μm and the permittivity of silicon**(ε**is_{si})**1.044x10**At the junction, the approximate value of the peak electric field (in kV/cm) is _________.^{-12}F/cmQuestion 5

Consider an ideal silicon P-N junction diode with the following parameters

The ratio of so that 95% of current in depletion region is carried by electron is

The ratio of so that 95% of current in depletion region is carried by electron is

Question 6

The transition Capacitance of a step graded Si p-n junction diode is 20PF at a reverse bias voltage of 5V , and if reverse bias voltage is increased by 1 v , then the change in capacitance is ______(pF)

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Aug 2ESE & GATE EC

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