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GATE EC 2022: Digital Circuits Quiz 11

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Question 1

A 16 Kb (=16,384 bit) memory array is designed as a square with an aspect ratio of one (number of rows is equal to the number of columns). The minimum number of address lines needed for the row decoder is __________ .

Question 2

If the number of bits in input and output codes is 6 and 8 respectively for a ROM.
The memory of this chip equal to

Question 3

A digital computer has a memory unit with 20 bits per word. The instruction set consists of 120 different operations. Each instruction is stored in 1 word of memory and consists of operation part and address part. The number of words can be accommodated by the memory unit are

Question 4

A ROM array is built with the help of diodes as shown in the circuit below. Here and are signals that select the word lines and and are signals that are output of the sense amps based on the stored data corresponding to the bit lines during the read operation.

During the read operation, the selected word line goes high and the other word line is in a high impedance state. As per the implementation shown in the circuit diagram above, what are the bits corresponding to (where or 1 and or 1) stored in the ROM?

Question 5

The address inputs and data outputs of a 16K x 14 memory chip are ____

Question 6

Three memory chips having equal 10-bits address bus are of sizes 1KB,2KB and 4KB. The data bus sizes of these three chips are respectively
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Mayank SoniMayank SoniMember since Mar 2021
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