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GATE EC 2022: Digital Circuits Quiz 10

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Question 1

Which of following statement is correct regarding hazards ?

Question 2

For TTL circuit

IOH = 400 μA, I1H = 40μA

IOL = 16mA, IIL = 2mA

Find the fan – out

Question 3

A standard CMOS inverter is designed with equal rise and fall times (βn = βp). If the width of the PMOS transistor in the inverter is increased, what would be the effect on the Low Noise Margin (NML) and the High Noise Margin NMH?

Question 4

The CMOS circuit shown below implements the logic family



Question 5

Which of following logic expression are shown

Question 6

Consider the RTL gate shown below. The transistor parameters are  and . The logic high voltage is VH = 3.5 V. If input drive the similar type of gate, then the fan out is………



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Sep 21ESE & GATE EC

Posted by:

Mayank SoniMayank SoniMember since Mar 2021
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