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GATE EC 2022: Analog Quiz 5 (App update required to attempt this test)
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Question 1
Consider the circuit shown below.
If op-amps in the circuit are ideal, then which of the following option is correct?
If op-amps in the circuit are ideal, then which of the following option is correct?
Question 2
Consider the following circuit:
Input impedance(in kΩ) seen by the voltage source is:
Input impedance(in kΩ) seen by the voltage source is:
Question 3
Study the circuit shown in the figure below
A current controlled current source (CCCS) is designed by using of an ideal op-amp circuit. If the output current Io of the circuit which is measured across the load resistance RL is related to the input as I0=Ii/C then the value of C is equal to
A current controlled current source (CCCS) is designed by using of an ideal op-amp circuit. If the output current Io of the circuit which is measured across the load resistance RL is related to the input as I0=Ii/C then the value of C is equal to
Question 4
Determine the total gain of the given circuit, if 
Question 5
Consider the circuit shown in the figure. In this circuit R = 1 kΩ and C = 1 μF. The input voltage is sinusoidal with a frequency of 50 Hz, represented as a phasor with magnitude Vi and phase angle 0 radian as shown in the figure. The output voltage is represented as a phasor with magnitude V0 and phase angle δ radian. What is the value of the output phase angle δ (in radian) relative to the phase angle of the input voltage?
Question 6
The switch S in the circuit of the figure is initially closed. It is opened at time t = 0. You many neglect the Zener diode forward voltage drops. What is the behavior of 
for t > 0?
for t > 0? - 137 attempts
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Jun 4ESE & GATE EC
