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GATE EC 2022: Analog Quiz 2 (App update required to attempt this test)

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Question 1

In the circuit shown below, the Zener diode is ideal and the Zener voltage is 6V. The output voltage V0 (in volts) is ____________.
Description: D:\GradeStack Courses\GATE Tests (Sent by Ravi)\GATE EC 10-Mar\GATE-ECE-2015-Paper-1_files\image059.jpg

Question 2

A half wave rectifier has a load resistance of 1.2 KΩ and peak ac voltage is 320 V. The root mean square value of current Is, if Rf = 100 Ω, where the symbols have their usual meaning.

Question 3

A junction field effect transistor is shown in the figure. Its drain to source safe current is 20mA and pinch off voltage is -7.8 V. Also rd is given as 30 kΩ

The voltage gain of the amplifier is

Question 4

Consider the self biased BJT circuit shown in figure. R1=10kΩ and R2=12kΩ and Vcc=11V.Assume VBE=5V and Re=2kΩ. The approximate voltage across its base and the emitter current will be:

Question 5

In the circuit shown, transistors Q1 and Q2 are biased at a collector current of 2.6mA. If transistor current gains are sufficiently large to assume collector current equal to emitter current and thermal voltage of 26 mV, the magnitude of voltage gain V0/Vs in the mid-band frequency range is __________ (up to second decimal place).
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Question 6

A DC current of 26 μA flows through the circuit shown. The diode in the circuit is forward biased and it has an ideality factor of one. At the quiescent point, the diode has a junction capacitance of 0.5 nF. Its neutral region resistances can be neglected. Assume that the room temperature thermal equivalent voltage is 26 mV.

For the amplitude of the small-signal component of diode current (in μA, correct to one decimal place) is ___________.

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V V Satya Narayana MadasuV V Satya Narayana MadasuMember since Sep 2020
Gate Qualified in 2018,2019,2020,2021| ISRO Exam qualified| AIR -672|Completed M.Tech in VLSI Design
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