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GATE CS 2022: Digital Logic-4 (App update required to attempt this test)
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A bidirectional 4-bit shift register is storing the nibble 1101. Its input is HIGH. The nibble 1011 is waiting to be entered on the serial data-input line. After three clock pulses, the shift register is storing ________
A 5-bit asynchronous binary counter is made up of five flip-flops, each with a 12 ns propagation delay. The total propagation delay is ____________
The output waveforms of a counter circuit shown below:
The counter is
Consider a 3-bit number A and 2 bit number B are given to a multiplier. The output of multiplier is realized using AND gate and one bit full adderes. If minimum nubmer of AND gates required are X and one bit full address required are y, then X + Y = _____.
consider the SOP form of a function F given as
The number of prime implicant which are not essential prime implicant is __.
What is the output of the flip-flop in KHz shown in the figure, if the clock frequency is 4KHz?
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Jun 1GATE & PSU CS
Priya UpadhyayMember since Sep 2020Priya Upadhyay