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GATE CS 2021 : Computer organization Quiz 9
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Consider a system employing interrupt driven I/O for a particular device that transfers data at an average of 8KB/s on a continous basis. Assume that interrupt processing takes about 100s (i.e the jump to jump tp the interrupt service rotine (ISR), execute it and return to the main program). Determine what fraction of processor time is consumed by this device if it interrupts for every byte.
The size of the data count register of a DMA controller is 16 bits. The processor needs to transfer a file of 29,154 kilobytes from disk to main memory. The memory is byte addressable. The minimum number of times the DMA controller needs to get the control of the system bus from the processor to transfer the file from the disk to main memory is __________.
The number of DMA parameters sent by CPU to the DMA controller is
Busy waiting condition occur during which type of interrupt handling mode for I/O
CPU has two modes high priority and low Priority. In order to change the mode from high priority to low priority
Which of the following is hardware generated signal.
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Oct 28GATE & PSU CS
Harshita AgarwalMember since Jul 2020