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GATE 2023 Analog Circuits Quiz 54

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Question 1

A silicon n-MOSFET has W=10 μm and L = 1μm. The oxide thickness is 20 nm and the threshold voltage is 1V, the device is biased with a gate to source voltage of 3V and drain to source voltage of 5V. Assume that the mobility is 300 cm2/VS. The MOSFET is biased in which region of operation?

Question 2

Find the value of RD if

1) I DSS = 4mA
2) VP= -3 V
3) VDS=

Question 3

A p-channel depletion mode MOSFET has the following parameters

= 0.5 mA/, = -2 V, if = 0, then current for = 1V in mA?

Question 4

Consider the circuit shown,

It VTN = 0.8V, Kn1=30μA/v2, if width to length ratios of M1 and M2 are then the output voltage V0 is _____ V

Question 5

For the transistor shown below, parameters are VTH=1V and Kn =12.5µA/V2. The Q-point (ID, VDS) is?

Question 6

The voltage VD (in V) for the given network shown below is.

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Jun 30ESE & GATE EC