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GATE 2022 Toppers Quiz -6
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Question 1
The minimum number of 2-input NAND gates required to implement a 2-input XOR gate is
Question 2
If , the energy per bit of a binary digital signal, is 10–6 watt–sec and the one–sided power spectral density of the white noise, N0 = 10–5‑ W/Hz, then the output SNR of the matched filter is
Question 3
A system has poles at 0.01 Hz, 1 Hz and 80 Hz; zeros at 5 Hz, 100 Hz and 200 Hz. The approximate phase of the system response at 20 Hz is
Question 4
Choose the correct one from among the alternatives A, B, C, D after matching an item in Group 1 with the most appropriate item in Group 2.
Group 1
P- Ring modulator
Q- VCO (Voltage Controlled Rectifier)
R- Foster–Seely discriminator
S- Mixer
Group 2
1- Clock recovery
2- Demodulation of FM
3- Frequency conversion
4- Summing the two inputs
5- Generation of FM
6- Generation f DSB–Sc
Group 1
P- Ring modulator
Q- VCO (Voltage Controlled Rectifier)
R- Foster–Seely discriminator
S- Mixer
Group 2
1- Clock recovery
2- Demodulation of FM
3- Frequency conversion
4- Summing the two inputs
5- Generation of FM
6- Generation f DSB–Sc
Question 5
A p-n step junction diode with a contact potential of 0.65 V has a depletion width of 1μm at equilibrium. The forward voltage (in volts, correct to two decimal places) at which this width reduces to 0.6μm is _________.
Question 6
In the circuit shown below, the op-amp is ideal, the transistor has and . Decide whether the feedback in the circuit is positive or negative and determine the voltage V at the output of the op-amp.
Question 7
The circuit given below was at steady state at t = 0– with switch at position 1. At t = 0, switch is moved to position 2. At t = 0+ voltage across coil is 120 V.
The time taken for 90% of energy stored in inductor to be dissipated is _______ msec.
Question 8
The complex integration would evaluate to
, where C is a curve defined by |Z| = 2.
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ESE & GATE ECGeneralDec 17ESE & GATE EC